DDR4 LP RAM specification leaked
At present JEDEC is discussing LPDDR4 standard that includes 3200Mb/s data rate (3.2GHz effective clock-speed), 350mVpp max signaling with configurable termination using low-voltage swing terminated logic as well as 1.1V voltage. In addition, data bus inversion has been added to improve signal integrity. Perhaps, one of the main changes of LPDDR4 over previous-generation standards is that LPDDR4 memory die will architecturally be two-channel x16 DRAM.
"The challenge is how to achieve that energy reduction at 3200Mb/s, and the sub-committee had to look at architectural, signaling and voltage changes. […] The objective is to improve timing closure, as well as reducing internal DRAM die power,” said Hung Vuong, chairman of JEDEC's JC-42.6 subcommittee for low power memories, in a conversation with EETimes-India.
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DDR4 LP RAM specification leaked Reviewed by Maherr Live on Friday, December 20, 2013 Rating: